An electronic computer aided design (“E-CAD”) package is utilized to construct a Very Large Scale Integration (“VLSI”) circuit design. The VLSI circuit design consists of a netlist that identifies electronic design elements (e.g., capacitors, transistors, resistors, etc.) and their interconnectivity (e.g., signal nets) within the VLSI circuit design.
A significant characteristic of VLSI and other types of circuit design is a reliance on hierarchical description. A primary reason for using hierarchical description is to hide the vast amount of detail in a design. By reducing the distracting detail to a single object that is higher in the hierarchy, one can greatly simplify many E-CAD operations. For example, simulation, verification, design-rule checking, and layout constraints can all benefit from hierarchical representation, which makes them more computationally tractable. Since many circuit designs are too complicated to be easily considered in their totality, a complete design is often viewed as a collection of design element aggregates that are further divided into sub-aggregates in a recursive and hierarchical manner. In VLSI circuit design, these aggregates are commonly referred to as design blocks or cells. The use of a design block at a given level of hierarchy is called an ‘instance’.
Design blocks may be constructed from electronic design elements, signal nets and other design blocks, and may be used one or more times within the VLSI circuit design. Each design block has one or more ‘ports’, each of which provides a connection point between a signal net within the design block and a signal net external to the design block.
During development, a design engineer uses an E-CAD tool to analyze the VLSI circuit design. The E-CAD tool traces through instances of blocks used in the VLSI circuit design, to detect problems with the VLSI circuit design, by applying instantiation-specific characteristics (e.g., switching frequencies and scaling factors) to the analysis. During this analysis, the E-CAD tool therefore analyzes information for each re-used design block many times, each instance of the re-used design block being individually processed. If the VLSI circuit design has billions of design elements, the analysis can take hours or even days of processing time to complete, resulting in lost productivity. Continuous lost productivity due to lengthy engineering development slows technology advancement and can result in significant costs, as well as lost business.
Reliability of the VLSI design is also a key factor to product success. Electromigration and self-heating analyses help ensure this reliability. Because VLSI circuit electromigration analysis tools perform analysis on the entire hierarchy of the VLSI design, the maximum design size that may be analyzed is limited due to associated large data file sizes. Accordingly, as VLSI designs increase in size, analysis tools cannot properly analyze the large amounts of data.